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AMD K9
The AMD K9 represents a microarchitecture by AMD designed to replace the K8 processors, featuring dual-core processing. == Development == K9 appears originally to have been an ambitious 8 issue per clock cycle core redesign of the K7 or the K8 processor core.〔(The Inquirer report, 3 November 2005 )〕 At one point, K9 was the ''Greyhound'' project at AMD, and was worked on by the K7 design team beginning in early 2001, with tape-out revision A0 scheduled for 2003. The L1 instruction cache was said to hold decoded instructions, essentially the same as Intel's trace cache. The existence of a massively parallel CPU design concept for heavily multi threaded applications has also been revealed, as a planned successor to K8. This was reportedly canceled in the conceptualization phase, after about 6 months' work. At one time K9 was the internal codename for the dual-core AMD64 processors as the brand Athlon 64 X2,〔(The Inquirer report, 6 February 2007 )〕〔(Video interview of Giuseppe Amato (AMD's Technical Director, Sales and Marketing EMEA) done in February 2007 )〕 however AMD has distanced itself from the old K series naming convention, and now seeks to talk about a portfolio of products, tailored to different markets.
抄文引用元・出典: フリー百科事典『 ウィキペディア(Wikipedia)』 ■ウィキペディアで「AMD K9」の詳細全文を読む
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